1. Calculate the Next State
Select a flip-flop, enter its inputs and present state, then calculate Q(n+1).
Hold
Equation: Q(n+1) = S + R'Q(n)
Transition: 0 → 0
This models ideal behavior at the active clock edge. It does not simulate real-world propagation delay or setup and hold timing.
2. Characteristic Table
3. Excitation Table
An excitation table gives the inputs needed to move from the present state to a desired next state.
X means “don't care”: either 0 or 1 is acceptable for that input.
4. Clock Sequence Simulator
Enter a series of input values and simulate successive clock edges.
For D or T, enter comma-separated bits, for example: 1,1,0,1.
Flip-Flop Characteristic Equations
Q(n+1) = S + R'Q(n)
S=R=1 is invalid in the basic active-high SR model.
Q(n+1) = JQ'(n) + K'Q(n)
00 holds, 01 resets, 10 sets and 11 toggles.
Q(n+1) = D
The next state equals the data input.
Q(n+1) = T XOR Q(n)
T=0 holds the state; T=1 toggles it.
How to Use This Calculator
- Select SR, JK, D or T.
- Set the present state Q(n) to 0 or 1.
- Enter the input values shown for that flip-flop.
- Click Calculate Next State.
- Use the characteristic and excitation tables to review all state combinations.
- Run the clock sequence simulator to calculate several successive states.
- Download CSV files to save results in a spreadsheet.
What is a flip-flop?
A flip-flop is a sequential digital circuit that stores one bit. Its next output depends on its current state and its inputs. Flip-flops are commonly used in registers, counters, memory elements and finite-state machines.
SR versus JK flip-flops
The basic SR flip-flop uses Set and Reset inputs and forbids the combination S=R=1. The JK flip-flop avoids that forbidden combination by using J=K=1 to toggle the stored state.
D versus T flip-flops
A D flip-flop stores the value at its D input at the active clock edge. A T flip-flop holds its current state when T=0 and complements the state when T=1.
Frequently Asked Questions
What does Q(n+1) mean?
It is the next state after the active clock edge. Q(n) represents the present state before that edge.
Why is an SR input of 11 invalid?
In the basic active-high SR model, setting and resetting simultaneously is a forbidden combination.
What happens when J=K=1?
The JK flip-flop toggles its state from 0 to 1 or from 1 to 0.
Can I download the results?
Yes. Generate the relevant table or sequence, then click its CSV download button.